View AN2123_8243437.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

AN2123/0205 revision 1 1/15 1 introduction the td351 is an advanced igbt driver with integrated control and protection functions. it is a simplified version of the td350, available in an so8 or dip8 package. the td35x family (including the td350, td351 and td352) provides a wide range of drivers specially adapted to drive 1200 v igbts with current ratings of 15 to 75 a in econopak-like modules (see figure 2 ). the main features of the td351 are: - 1 a sink/0.75 a source peak output current minimum over the full temperature range (-20c to 125c), - active miller clamp function to reduce the risk of induced turn-on in high dv/dt conditions, and in most cases, without requiring a negative gate drive, - optional 2-step turn-off sequence to reduce over-voltage in case of an over-current or a short- circuit situation; a feature that protects the igbt and avoids rbsoa problems, - input stage compatible with both an optocoupler and a pulse transformer. applications include three-phase full-bridge invert ers such as in motor speed control and ups systems (see figure 1 ). figure 1. td351 in 3-phase inverter application (1200 v igbts) phase 1 phase 2 phase 3 v+ dcbus v- dcbus high-side power supply or bootstrap circuitry low-side power supply td351 td351 td351 td351 td351 td351 AN2123 application note td351 advanced igbt driver principles of operation and application by jean-fran?ois garnier & anthony boimond
td351 application example AN2123 2/15 2 td351 application example a td351 application example is shown in figure 3 . in this example the device is supplied by a +16v isolated voltage source. an optocoupler is used for input signal galvanic isolation. the igbt is driven by 44 ? for turn-on and 22 ? for turn-off thanks to the use of two gate resistors and one diode: sink and source currents can therefore be tuned independently to help and solve emi issues. power switch drivers are used in very noisy environment and decoupling of the supplies should be cared. in the application example the decoupling is made by a 100nf ceramic capacitor located as close as possible to the td351 in parallel with a bigger electrolytic capacitor. figure 2. igbt modules figure 3. td351 application example vh 10k 11v 100nf 4k7 10nf 100pf 16k 470pf 16v 22 ? 22 ? 1 2 3 4 5 6 7 8 td351 cd in vref lvoff out vl clamp vh
AN2123 input stage 3/15 3 input stage the td351 is compatible with the use of both pulse transformers or optocouplers. the schematics shown in figure 4 can be considered as example of use with both solutions. when using a pulse transformer, a 2.5 v reference point can be built from the 5 v vref pin with a resistor bridge. the capacitor between the vref and the bridge middle point provides decoupling of the 2.5 v reference, and also insures a high level on in input at power-up, in order to start the td351 in the off state. when using an optocoupler, the in pin can be pulled-up to vref. the pull up resistor is to be chosen between 5 k ? to 20 k ? depending on the characteristics of the optocoupler. an optional filtering capacitor can be added in case of a highly noisy environment, although the td351 already includes filtering on input signals and rejects signals smaller than 135 ns (t onmin specification). waveforms from the pulse transformer must comply with the t onmin and v ton /v toff specifications (see figure 5 ). to turn td351 output on, the input signal must be lower than 0.8 v for 220 ns minimum. conversely, the input signal must be higher that 4.2 v for 220 ns minimum in order to turn off td351 output. a pulse width of about 500 ns at the threshold levels is recommended. in all cases, input signal at the in pin must be between 0 and 5 v. figure 4. application schematic (pulse transformer at left; optocoupler at right) figure 5. typical input signal waveforms with pulse transformer (left) or optocoupler (right) in vref 4k7 10nf 100pf td351 2 1 in vref td351 10 k 10 k 10k 10nf 2 1 pulse transformer optocoupler
output stage AN2123 4/15 4 output stage the output stage is able to sink/source about 1.7 a / 1.3 a typical at 25c with a voltage drop vol/voh of 6 v (see figure 6 ). the minimum sink/source currents over the full temperature range (-20c/+125c) are 1 a sink and 0.75 a source. vol and voh voltage drops at 0.5 a are guaranteed to 2.5 v and 4 v maximum respectively, over the temperature range (see figure 7 ). this current capability sets the limit of igbt driving, and the igbt gate resistor should not be lower than about 15 ? . figure 6. typical output stage current capability at 25c (vh=16v) figure 7. typical vol and voh voltage variation with temperature out source current versus voltage (turn-on) 0.0 0.5 1.0 1.5 2.0 2.5 0 5 10 15 vout (v) iout (a) out sink current versus voltage (turn-off) 0.0 0.5 1.0 1.5 2.0 2.5 051015 vout (v) iout (a) low level output voltage vs. temperature 0.0 1.0 2.0 3.0 -50 -25 0 25 50 75 100 125 temp (c) vol-vl (v) ios ink=500ma iosink=20ma high level output voltage vs. temperature 0.0 1.0 2.0 3.0 4.0 -50 -25 0 25 50 75 100 125 temp (c) vh-voh (v) iosource=500ma iosource=20ma
AN2123 active miller clamp 5/15 5 active miller clamp the td351 offers an alternative solution to the problem of miller current in igbt switching applications. traditional solutions to the miller current problem are: to drive the igbt gate to a negative voltage in off-state in order to increase the safety margin or, to implement an additional capacitor between the igbt gate and collector as described in the left- hand schematic in figure 8 ) the solution proposed by the td351 uses a dedicated clamp pin to control the miller current. when the igbt is off, a low impedance path is established between igbt gate and emitter to carry the miller current, and the voltage spike on the igbt gate is greatly reduced (see the right-hand schematic in figure 8 ). the clamp switch is open when the input is activated and is closed when the actual gate voltage goes close to the ground level. in this way, the clamp function doesn?t affect the turn-off characteristics, but simply keeps the gate at a low level during the entire off-time. the main benefit is that negative supply voltage can be avoided in most cases, allowing for the use of a bootstrap technique for the high-side driver supply, and a consistent cost reduction for the application. in addition, the use of the acti ve miller clamp feature avoids the need to implement any additional capacitors between the igbt gate and the collector. such capacitors would negatively affect the ability of the driver to control turn-on and turn-off. the test results shown in figure 9 prove how the active miller clamp results in a consistent reduction of the voltage spike on igbt gate. the left-hand waveform shows the result of a 400 v switching with a 10 nf additional gate to emitter capacitor to control the voltage spike on gate. figure 8. active miller clamp: principles of operation high dv/dt ! voltage spike on igbt gate ! high-side td351 high dv/dt ! reduced voltage spike miller current miller current active clamp low-side td351 high-side driver low-side driver 10r 10r 10nf optional capacitor implemented to reduce voltage spike no need for additional capacitor
active miller clamp AN2123 6/15 the right-hand waveform shows the results of the test in the same conditions but without any additional capacitors and with the active miller clamp. for high-power applications, buffers can be used to increase the output current capability. figure 10 shows a schematic principle with external buffers for both the driver output and the clamp function. figure 9. active miller clamp: test waveforms related to above schematic figure 10. using external buffer to increase the current capability of the driver and clamp outputs vce (100v/div) vge (1v/div) vce (100v/div) vge (1v/div) without miller clamp vgs spike up to 6v! miller clamp implemented in the same conditions, the vgs spike is reduced to about 3v 7 6 out vl 8 vh 5 clamp td351 vh t1 t2 t3
AN2123 active miller clamp 7/15 for very high-power applications, the active clamp function cannot replace the negative gate drive, due to the effect of the parasitic inductance of the active clamp path. in these cases, the application can benefit from the clamp output as an secondary gate discharge path (see figure 11 below). with the above schematic, when the gate voltage goes close to vl+2 v (i.e. the igbt is already driven off), the clamp pin is activated. again, the benefit is to lower the resistance between gate and emitter when the igbt is in the off state without affecting the igbt turn-off characteristics. tip: what should one do with the clamp pin when not used in application? connect clamp to vl. figure 11. high power application: negative gate drive and secondary gate discharge path vh 1 2 3 4 5 6 7 8 td351 cd in vref lvoff out vl clamp vh t1 t2 t3 16v -10v
2-level turn-off AN2123 8/15 6 2-level turn-off in the event of a short-circuit or overcurrent in the load, a large voltage overshoot can occur across the igbt at turn-off and can exceed the igbt breakdown voltage. by reducing the gate voltage before turn- off, the igbt current is limited and the potential over-voltage is reduced. this technique is called 2-level turn-off . both the level and duration of the intermediate off level are adjustable. the duration is set by an external resistor/capacitor in conjunction with the integrated voltage reference for accurate timing. the level can be easily set by an external zener diode, and its value is chosen depending upon the igbt?s characteristics. this 2-level turn-off sequence takes place at each cycle; it has no effect if the current doesn?t exceed the normal maximum rated value, but protects the igbt in case of overcurrent (with a slight increase to conduction losses). the principle is shown on figure 12 . during the 2-level turn-off time, the out pin is controlled by a comparator between the actual out pin and an external reference voltage. when the voltage on out goes down as a result of the turn-off and reaches the reference threshold, then the out output is disabled and the igbt gate is discharged no further. after the 2-level turn-off delay, the out output is enabled again to end the turn-off sequence. to keep the output signal width unchanged relative to the input signal, the turn-on is delayed by the same value than the 2-level turn-off delay (see figure 13 ). the duration of the 2-level turn-off is set by the external rd-cd components, and is approximately given by the formula: t a (in s) = 0.7 * r d (in k ? ) * c d (in nf) recommended values are r d from 10k ? to 20k ? , and c d from 100 pf to 470 pf, providing a range of delay from about 0.7 to 6.6 microseconds. figure 12. principle schematic for 2-level turn-off feature control block 120a vref vh 3 2,5v 4 cd lvoff 7 6 out vl lvoff off
AN2123 2-level turn-off 9/15 practical tests were made with 1200 v - 50 a igbt modules fuji 6mbi50s120l. the results shown in figure 14 point out how the 2-level turn-off feature can consistently reduce voltage stress on the igbt in the event of over-current. during this test, the 50 a-rated igbt module has to turn-off a 300 a current simulating an application faulty condition. the left-hand graph in figure 14 shows a standard commutation. the driver out pin voltage is abruptly pulled from 16 v to 0 v and the igbt gate is discharged through the gate resistor. the fast turn-off of the igbt generates a voltage spike on vce reaching 1kv , which is dangerously close to the igbt absolute maximum rating (1200 v). the calculated turn-off energy reaches 19 mj . the right-hand graph in figure 14 shows how the td351 and its 2-level turn-off feature can help deal with this situation. during the first phase, the td351 out pin is pulled from 16 v to 9 v during 2.5 s. in the second phase the out pin is pulled to 0 v. as a consequence, the igbt turn-off is slightly longer and the vce voltage spike is advantageously reduced to 683 v . the calculated turn-off energy reaches 31 mj , but the resulting overheating can be more easily managed than the destruction of the igbt by over- voltage stress. figure 13. waveforms of the 2-level turn-off function (coff timing exaggerated for illustration) figure 14. reduction of igbt over-voltage stress using 2-level turn-off feature ic=300a vce=400v overshoot 1kv td351 out igbt vge ic=300a vce =400v overshoot 683v td351 out igbt vge standard commutation 2-level turn-off w ith lvoff=9v
2-level turn-off AN2123 10/15 maximum voltage reached on the igbt collector and commutation losses are shown in the charts of figure 15 . the influence of the lvoff value is studied both for nominal rated current at 25c (75 a) and over current (300 a) conditions. it can be noted that in over-current conditions (see figure 15 , left graph) the 2-level turn-off can bring a significant reduction of vcemax during turn-off. with lvoff values from 8 to 11 v, vcemax is reduced from 1000 v to less than 750 v. the price to pay is an increase of the switching losses eoff that are shifted from 20 mj to 30~40 mj. in normal conditions (see figure 15 , right graph) there is no noticeable difference to be seen regardless wheter the 2-level turn-off feature is used or not, as long as lvoff is greater than 8.5 v. these results suggest that it is useful to set the lvoff value from 9 to 10 v. tip: how does one disable the 2-level turn-off feature? connect lvoff to vh, remove c d capacitor and keep the cd pin connected to vref by a 4.7 k ? to 10 k ? resistor. figure 15. influence of lvoff value on vcemax and turn-off energy (igbt fuji 6mbi50s120l) over-current conditions: 400v/300a 0 200 400 600 800 1000 1200 7 8 9 101112 lvoff (v) vce max (v) 0 10 20 30 40 50 60 eoff (mj ) vce max 2-level vce max standard eoff 2-level eoff standard normal conditions: 400v/75a 0 200 400 600 800 7 8 9 10 11 12 lvoff (v) vce max (v) 0.00 2.00 4.00 6.00 8.00 eoff (mj ) vce max 2-level vce max standard eoff 2-level eoff standard
AN2123 application schematic 11/15 7 application schematic the td351 application design presented hereafter is based on the active miller clamp concept. with this function, the high-side driver can be supplied with a bootstrap system inst ead of using a floating positive/ negative supply. this concept is applicable to low- and medium-power systems, up to about 10 kw. main benefit of this is to reduce the global application cost by making the supply system simpler. figures 16 shows the half bridge design concept using the td35x. it should be highlighted that the active miller clamp is fully managed by the td35x and doesn?t require any special action from the system controller. the td351 is able to drive 1200 v igbt modules up to 50 a or 75 a (depending on igbt technology and manufacturer). key parameters to consider are the td351 peak output current (0.75 a source / 1.0 a sink) and the igbt gate resistor. the values of gate resistors should be chosen starting with the recommended values from the igbt manufacturer. thanks to the active miller clamp function, the gate resistor can be tuned independently from the miller effect, which normally puts some constraints on the gate resistor. the benefit is to optimize the turn-on and turn-off behavior, especially regarding switching losses and emi issues. table 1 shows the recommended gate resistors values from two major igbt module manufacturers, and the peak gate current (with a 15 v supply) required for 10 a to 100 a igbt modules. approximate application power is indicated. figure 16. td35x application concept vh vl rb 5 td35x out clamp 24v + cb 4.7u vh vl td35x out clamp high side in in 4k7 15v 15v vreg vref 4k7 vref
application schematic AN2123 12/15 igbt modules suitable for td351 are indicated in bold. for the fp50r12ke3 and 6mbi75s-120 modules, the source (charging) peak current will be limited to 0.75 a in worst-case conditions instead of the theoretical 0.8 a or 0.9 a peak values; this usually doesn?t affect the application performance. an external buffer will be required for higher power applications. a reference schematic is shown in figure 17 . it uses a bootstrap principle for the high-side driver supply. a very simple voltage regulator is used in front of the td351 high-side driver. in this way, the bootstrap supply voltage can be made significantly higher than the target driver supply, and the voltage across the cb bulk capacitor can exhibit large voltage variations during each cycle with no impact on the driver operation. gate resistor rg depends on the igbt. it should be noted that the applications only use two supplies referenced to the ground level. table 1. recommended gate resistors eupec: fpxxr12ke3 15 25 40 50 75 a rgate 75 36 27 18 5 ? ipeak 0.2 0.4 0.55 0.8 3a fuji: 6mbixxs-120 10 15 25 35 50 75 100 a rgate 120 82 51 33 24 16 12 ? ipeak 0.12 0.2 0.3 0.45 0.6 0.9 1.3 a app. power 1.52345711 15 kw
AN2123 application schematic 13/15 figure 17. td351 application schematic with 2-level turn-off 100n 5 24v 16v 2.2k + 4.7u high side drivers in out vh cd clamp gnd vref lvoff td351 rg 10n 11v 220p 10k 5 5 100n 15v low side drivers 10k 4k7 100n in out vh cd clamp gnd vref lvoff td351 rg 10n 11v 220p 10k 10k 4k7
conclusion AN2123 14/15 8 conclusion the td351 is part of the new td35x igbt driver family, and is designed for 1200 v, 3-phase inverter applications, especially for motor control and ups systems. it covers a large range of power applications, from 0.5 kw to more than 100 kw. thanks to its ac tive miller clamp feature and low quiescent current, it can help avoid using negative gate driving for application up to 10 kw and simplifies the global power supply system for cost-sensitive applications.
15/15 AN2123 revision history information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech repubic - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com 9 revision history date revision description of changes 01 feb. 2005 1 first release.

▲Up To Search▲

Price & Availability of AN2123

	To Download AN2123 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .